Registro de desplazamiento controlado por tensión, MC74VHCT245ADTG, TSSOP 24 pines

High Speed: tPD = 4.9ns (Typ) at VCC = 5V
Low Power Dissipation: ICC = 4μA (Max) at TA = 25 C
High Noise Immunity: VNIH = VNIL = 28% VCCPower Down Protection Provided on Inputs and Outputs
Balanced Propagation Delays
Designed for 2V to 5.5V Operating Range
Low Noise: VOLP = 1.2V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300mA
ESD Performance: HBM > 2000V, Machine Model > 200V
Chip Complexity: 304 FETs or 76 Equivalent Gates
Application Notes
Do not force a signal on an I/O pin when it is an active output, damage may occur.
All floating (high impedance) input or I/O pins must be fixed by means of pull up or pull down resistors or bus terminator ICs.
A parasitic diode is formed between the bus and VCC terminals. Therefore, the VHC245 cannot be used to interface 5V to 3V systems directly.