Traductor de nivel lógico, MC100ELT23DTG, TSSOP 8 pines

The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL (Positive ECL) levels are used, only +5 V and ground are required. The small outline 8-lead package and the dual gate design of the ELT23 makes it ideal for applications which require the translation of a clock and a data signal. The PECL inputs are differential, therefore, the MC100ELT23 can accept any standard differential PECL input referenced from a VCC of 5.0 V.

3.5ns Typical Propagation Delay
24mA TTL Outputs
Flow Through Pinouts
ESD Protection: > 2 KV HBM, > 400 V MM
The 100 Series Contains Temperature Compensation
Operating Range VCC= 4.75 V to 5.25 V with GND= 0 V
Internal Input Pulldown Resistors
Moisture Sensitivity Level 1 For Additional Information, see Application Note AND8003/D
Transistor Count = 91 devices